• Full Time
  • Tel Aviv

veriests

Veriests FPGA designer Experience

Requirements:

3+ years of experience
Experience with FPGA implementation (synthesis, P&R, timing closure) and Lab debug
Design coding language – Verilog/VHDL
Experience with FPGA embedded processors (Nios/MicroBlaze/MICO) – advantage
Good understanding of Ethernet, Networking, Microprocessors, HD Video and Audio – an advantage
Expert in VLSI, FPGA and SoC design
Excellent communication skills with fluent verbal and written English
BSc in Electronic Engineering

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